EIA JESD 22-B113B:2018

The Board Level Cyclic Bend Test Method is intended to evaluate and compare the performance of SMT ICs in an accelerated test environment for handheld electronic products applications. The purpose is to standardize the test methodology to provide a reproducible performance assessment of SMT ICs while duplicating the failure modes normally observed during product level test. This is not a SMT IC qualification test and is not meant to replace any product level test that may be needed to qualify a specific product and assembly. Correlation between test and field conditions is not yet fully established. Consequently, the test procedure is presently more appropriate for relative SMT IC performance than for use as a pass/fail criterion. However, to do comparisons care must be taken to have the same test variables used, such as SMT IC configuration and size. This standard assumes a surface mount device such as BGAs, LGAs (excluding sockets and connectors), TSOP, and CSPs. Discrete SMT devices, e.g., capacitors, resistors, etc., are outside the scope of this test method. Furthermore, this test method is only applicable for handheld products applications where cyclic bending due to repeated key-press operations is a concern. The size of surface mount device is limited to 15 mm x 15 mm maximum.