Cart
0
Product
Products
(empty)
No products
To be determined
Shipping
$0.00
Total
Product successfully added to your shopping cart
Quantity
Total
There are 0 items in your cart.
There is 1 item in your cart.
Total products
Total shipping
To be determined
Total
More info
Defines a framework for 8-, 16-, 32-, and 64-bit parallel bus computer architectures that can implement single and multiprocessor systems. Based on the VMEbus specification released by the VMEbus Manufacturers Group (now VITA) in August 1982, this bus includes the initial four basic subbuses: (1) data transfer bus, (2) priority interrupt bus, (3) arbitration bus, and (4) utility bus. Other architectures with other subbuses are possible within this VME framework.
| Author | ANSI/VITA |
|---|---|
| Editor | VITA |
| Document type | Standard |
| Format | File |
| Confirmation date | 2011-11-04 |
| ICS | 35.160 : Microprocessor systems
|
| Cross references | 97/642782 DC (1997-05-23), NEQ |
| Year | 1990 |
| Document history | |
| Country | USA |
| Keyword | ANSI 1;1;ANSI/VITA 1-1994 (S2011) |