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Describes a packet network protocol called Myrinet for communications between VME modules using interconnects either on a front panel or on a backplane. Networks may be module to module, subrack to subrack, and/or chassis to chassis.
| Author | ANSI/VITA |
|---|---|
| Editor | VITA |
| Document type | Standard |
| Format | File |
| Confirmation date | 2011-11-04 |
| ICS | 35.160 : Microprocessor systems
|
| Year | 1990 |
| Document history | |
| Country | USA |
| Keyword | ANSI 26;26;ANSI/VITA 26-1998 (S2011) |